World’s Fastest SPI to 1553 Interface


Simplify 1553 Design with the…
Fastest SPI Controller!

The migration towards a System on Chip (SoC) approach to electronics systems is a growing trend within the military aerospace industry, driven primarily by a desire to reduce size, weight and power (SWaP), and to accommodate the requirements of complex avionics systems. But is an IP Core in an FPGA solution the best approach for implementing a 1553 interface? As an alternative, and simplified option, the use of DDC’s Nano-ACE MIL-STD-1553 ASIC controller, with a Serial Peripheral Interface (SPI) interface, provides a highly efficient interface between SoC processors and a MIL-STD-1553 bus.

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  • Ultra Small Size Saves Space & Enables More Compact & Higher Density Boards
  • Replaces 2 Transceivers, MIL-STD-1553 Protocol Core & Memory
  • RT Validated
  • Tx Inhibit Ball for MT Only Applications
  • Software and Register Compatible with ACE, Mini-ACE®, Enhanced Mini-ACE®, Micro-ACE®, and Mini-ACE® Mark3 Series Remote Terminals

Key Features

  • MIL-STD-1553 Protocol, RAM & Dual Low Power Transceivers
  • 1 Dual Redundant MIL-STD-1553 Channel
    • BC, RT, MT or RT/MT Operation
    • 4K x 16, 4K x 17, or 32K x 17 RAM
    • Optional RAM Parity
  • 48 Pin QFN Package, 7mm x 7mm x 1mm
  • 50MHz 4-Wire SPI to the Host Processor
  • Autonomous Self-Test
  • Optional Auto-Initialization From External EEPROM
  • Ultra Low Transceiver Power
  • +3.3V Only Operation
  • Fully Compliant to MIL-STD-1553A/B & MIL-STD-1760