SSRT-Core MIL-STD-1553 Intellectual Property (IP) Core

Description:

The 1553 SSRT-Core Intellectual Property (IP) is based on the architecture of DDC's powerful Enhanced Mini-ACE^TM Simple System Remote Terminal (SSRT) MIL-STD-1553 protocol engine. As a result, the SSRT-Core IP brings a legacy of demonstrated performance in thousands of air, land, and space applications.

Furthermore, the SSRT-Core is compatible with DDC's SSRT 1553 devices (BU-61703 / BU-61705 / BU-64703). This compatibility allows for easy prototyping and can help shorten development time by using DDC's 1553 components early in the design phase.

The SSRT-Core is a fully integrated 1553 Remote Terminal (RT) with customizable options to allow tailoring to meet your design requirements. The SSRT-Core is ideal for MIL-STD-1553 interfaces in systems that do not require a microprocessor such as sensors, displays and controls. The 1553 SSRT-Core contains an integrated DMA (Direct Memory Access) memory interface and provides for an optional 32-word burst readable FIFO. The FIFO serves to ensure that only complete, consistent blocks of validated data words are transferred to a system.

The 1553 core provides for flexibility in terms of interfacing and memory architecture. To minimize design risk, the design of the SSRT-Core's Manchester encoder/decoder is highly optimized for use with DDC's 5 volt or 3.3 volt MIL-STD-1553 transceivers. The SSRT-Core package includes VHDL core code, VHDL test bench code, and supporting documentation, thus enabling designers to instantiate the architecture in a variety of PLD, FPGA, or ASIC devices.

DDC supports each SSRT-Core instantiation with a choice of DDC 1553 transceivers available in either 5 volt or 3.3 volt versions including BU-63152G3-902, BU-63133 and BU-63155 transceivers. DDC's MIL-STD-1553 transceivers are small, low power, and are available to operate over the full military temperature range from -55 °C to +125 °C. Furthermore, they are compliant with MIL-STD-1760 amplitude requirements making them suitable for stores and munitions applications.

For applications requiring higher data rates, the 1553 SSRT-Core provides capability to operate up to 10 Mb/s and provides the hooks necessary to implement interfaces such as those used on SDB munitions.

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Features:

• Complete MIL-STD-1553 Remote Terminal
• Modular and Universally Synthesizable Code for Simple System Remote Terminal (SSRT)
  • Industry Tested, Proven Design
  • Use SSRT (BU-61703, BU-61705, or BU-64703) Components for Prototyping
• Highly Optimized Ultra Small Core
• Designed to Interface to 1553 Simple Processor-less Systems
• Scalable to Higher Bit Rates (EBR)
• 16-bit DMA Interfacing
• Optional FIFO for Burst Mode Read Capability
• Fully Compliant to MIL-STD-1553 RT Validation Test
• Includes VHDL Design and VHDL Test Bench Code
• Capable of Operating on Low Speed Grade FPGAs
• Fully Synchronous Design
• Instantiate on FPGAs or ASICs
• No On-Core Tri-State Buses or Latches
• Compatible with DDC 1553 Transceivers

Applications:

Documentation:

Product Brief

File: SSRT-Core MIL-STD-1553 Intellectual Property (IP) Core

Rev:1

4 Pages, 108 KB

Manual

File: SSRT-Core IP User's Guide 

Rev:C

98 Pages, 754 KB

Software:

Ordering Information:

Ordering Information

You can use the following link to download a PDF copy of the Ordering Information:

Ordering Information: SSRT-Core MIL-STD-1553 Intellectual Property (IP) Core Order Info

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